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ASIC/RTL Design Engineer - Specialized (US)

Santa Clara, CA

Posted: 08/21/2025 Job Number: 26180312

Job Description

Job Title: ASIC/RTL Design Engineer
Duration: 12+ months
Location: Santa Clara, CA
 
Key Responsibilities:
  • Develop/Maintain tests for functional verification.
  • Build the directed and random verification tests, debug test failures to determine the root cause, work with RTL and firmware engineers to resolve design defects and correct any test issues.
  • Work on functional & code coverage verification.
  • Provide technical support to other teams
Preferred Experience:
  • Experience with C/C++
  • Experience with Verilog, System Verilog, and modern verification libraries like UVM
  • 10+years of ASIC design verification experience
  • Experience / Background with DDR or Memory Controller. PHY Verification is a plus
  • Experience with scripting languages like Python, Perl and TCL is a plus.
  • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
  • Understanding of Design for Test methodologies and DFT verification experience is a plus
  • Proficient in debugging firmware and RTL code using simulation tools
Academic credentials:
  • Bachelor’s or master’s degree in computer engineering/Electrical Engineering

Meet Your Recruiter

Ganesh Iyer

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